Conference Report

Prototyping Systems using FPGA Event

21st May 2025  |   Rolls-Royce

The “Prototyping Systems Using FPGA” event held on Wednesday, 21 May 2025, at Rolls-Royce Control Systems in Birmingham, brought together engineers, developers, and verification experts to explore the pivotal role of FPGA technology in accelerating and de-risking ASIC and SoC development. Against a backdrop of increasing design complexity and shrinking time-to-market pressures, the event made a compelling case for FPGA prototyping as a cornerstone of modern hardware design—transforming ideas into validated systems long before silicon hits the fab.

Throughout the day, leading companies such as Sundance, Chipflow, Exostiv Labs, Cadence, Siemens, and dSpace delivered focused presentations that blended technical insight with real-world application. Talks ranged from Python-based FPGA design flows for industrial systems to advanced hardware-in-the-loop (HiL) setups for electric drives, and from closed-loop verification environments to ultra-high visibility debug platforms. The unifying message was clear: FPGAs are no longer just placeholders—they’re mission-critical platforms for pre-silicon validation and early firmware integration.

One of the standout themes was how FPGA-based systems allow development teams to run actual workloads—firmware, software stacks, real-time sensor feeds—against hardware designs while they’re still in RTL form. This not only shortens feedback cycles but uncovers subtle timing bugs and integration issues that traditional simulation can miss. Presentations by Siemens and Synopsys drove this point home by showcasing their powerful, scalable platforms for cycle-accurate, multi-FPGA system testing—bridging the gap between functional design and real-world operation.

Beyond the talks, attendees had the chance to engage in hands-on demos and tour a working facility, adding a tactile layer to the day’s insights. The event’s mix of technical depth, industry relevance, and practical exposure created a dynamic environment that left participants with a clear takeaway: if you’re serious about time, risk, and silicon success, FPGA prototyping is no longer optional—it’s essential.

EP Ready Hardware Assisted Verification Platforms

This video introduces Synopsys’s “EP-ready” hardware-assisted verification platforms, specifically the new Haps 200 (for prototyping) and Zebu 200 (for emulation).

Designed to tackle the massive complexity of modern semiconductor designs (driven by AI, autonomous systems, and soaring software lines of code), these platforms offer a single hardware solution configurable for both emulation and prototyping.

This approach aims to reduce total cost of ownership and eliminate the need for designers to decide upfront between the two verification methods.

Leveraging the largest AMD FPGAs, the platforms provide extreme performance, scalability up to 10.8-15 billion gates, enhanced debug capabilities, and improved compile times, ensuring efficient validation from early RTL stages to high-speed software development with real-world interfaces

The Importance of Deterministic Recompute in ASDAS Development and Testing

This video features James from ETAS, a Bosch subsidiary, discussing the critical role of deterministic recompute and FPGA prototyping in developing and testing Advanced Driver Assistance Systems (ADAS).

With rare collision-avoidance events being almost impossible to reproduce in real-world driving, the challenge lies in ensuring consistent and predictable behaviour of ADAS algorithms across various compute platforms (in-car embedded, lab, cloud).

ETAS addressed this by developing an FPGA-based “zero copy” middleware solution that eliminates data copying inconsistencies, guaranteeing the perception system always sees the same data and makes identical decisions.

FPGA prototyping was essential for analysing data paths and making trade-offs, allowing them to validate fixes, perform stress testing, and ensure reliable system updates, ultimately building trust in life-critical ADAS functionalities

Cloud, Local and Edge Solutions

This video introduces VTEC’s “Altra Edge” solution, a real-time power and control system optimization technology designed to move beyond traditional cloud or edge computing to the “ultra-edge” – acting directly within the control loop.

Unlike typical IoT approaches that rely on vast sensor data and historical models, Altra Edge predicts, detects, and corrects system responses (like motor torque transients) in 100 microseconds, requiring only auto-tune calibration at system start. FPGA-based prototyping was crucial for VTEC, a start-up, to rapidly develop and verify this solution with a limited budget, proving its effectiveness with a real motor before taping out their silicon.

The technology significantly reduces errors, optimizes performance (e.g., correcting motor speed errors and reducing peak currents), and uniquely provides insights into a system’s health by recording the corrections made, all while dramatically reducing the amount of data needing transmission compared to traditional monitoring

Enabling Detailed HiL Testing for Electric Drives

This video introduces DSpace, a German company established in 1988, specializing in Hardware-in-the-Loop (HiL) testing for electronic control systems (ECUs) in vehicles, aircraft, and more.

HiL simulates real-world conditions to “trick” an ECU into believing it’s in a physical system, saving significant cost and time. With ECU functionality rapidly increasing, especially for high-speed electric motors and advanced systems, traditional processor-based models are becoming too slow.

DSpace addresses this by leveraging FPGA technology for its high-speed processing, translating Simulink models into VHDL to run as fast FPGA components.

This enables “signal level simulation” to test ECUs even when internal visibility is limited, and it’s crucial for ISO 26262 compliance, ensuring comprehensive testing of ECU behaviour under various conditions

A Plea for Visibility in FPGA

This video by Exostiv Labs advocates for significantly greater utilization of FPGA prototyping throughout the semiconductor design flow, not just for traditional late-stage validation.

The speaker highlights that despite expensive EDA tools, only 14% of projects are “first-time right”. FPGAs offer the crucial ability to run designs at speed in realistic environments for extended cycles, overcoming simulation limitations.

Real-world examples show FPGAs being instrumental from early product planning and specification (e.g., a VR company deciding on a new platform) to live design and DSP algorithm development (e.g., a radio application firm).

The key challenge hindering wider adoption of FPGA prototyping, however, is a lack of visibility into the running system, preventing effective debugging and decision-making; thus, planning for visibility solutions is paramount to fully leverage FPGAs and fix what you don’t see

Fast FPGA and IC Prototyping

This video features Rob Taylor, CTO at Chip Flow, who discusses their approach to fast FPGA and IC prototyping, particularly for automotive and industrial applications.

He highlights the persistent challenge in embedded systems where initial hardware choices often prove suboptimal, and traditional chip design is extremely costly.

Chip Flow’s solution is a modern development environment that simplifies the process for both hardware and software engineers, allowing them to target FPGAs for prototyping and seamlessly transition to full IC tape-out. Key to their offering is the use of open-source tools, a Python-based design flow for easier assembly, and a robust VS Code debugging environment with deep design visibility.

Their platform also generates both hardware and software, includes a built-in simulator, and supports continuous integration for efficient validation and “right-first-time” silicon

‘Budget’ Prototyping on FPGA’s

This video introduces Sundance Systems, a company with 36 years of experience in designing and building electronics, specializing in FPGA-based prototyping since 1993.

The speaker showcases their evolution through various FPGA platforms, from early PC/DSP systems and multi-core DSP simulations to projects exploring 3D chip concepts.

The highlight is their new “budget” mega FPGA prototyping platform, featuring a master and four slave Microchip FPGAs.

Designed to offer low-cost, small-scale prototyping as an alternative to much larger, more expensive competitor systems, this new board costs around £18,000, offers significant I/O and memory, runs Linux, and can be configured for comparative prototyping or as one large FPGA block, emphasizing its lower cost and power consumption