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X-WR-CALDESC:Events for DESN
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DTSTART;TZID=UTC:20221109T120000
DTEND;TZID=UTC:20221109T160000
DTSTAMP:20220824T082438Z
CREATED:20220824T082255Z
LAST-MODIFIED:20220824T082438Z
UID:18951-1667995200-1668009600@desn.org.uk
SUMMARY:RF\, Micro & Milli Wave Network Event
DESCRIPTION:RF\, Micro & Milli Wave Network Event\nRegisterThis is the first RF Networking event for DESN.\nTo be held at the Huawei R&D Facility in Cambridge\, the aim of the group is to bring together design engineers from the RF\, Microwave and Milliwave communities together\, to collaborate and share knowledge as well as working to encourage the next generation of design engineers through. \nThis first meeting is to start to bring together companies to understand the needs and challenges for todays RF engineers. \nAll are welcome and we encourage the community to come together.
URL:https://desn.org.uk/event/rf-micro-milli-wave-network-event/
LOCATION:Huawei Technologies Research & Development (Uk) Limited\, Unit 101 Science Park\, Milton Road\, Cambridge\, CB4 0FY
CATEGORIES:DESN Event
ATTACH;FMTTYPE=image/jpeg:https://desn.org.uk/wp-content/uploads/2022/08/rf-event2-scaled.jpg
END:VEVENT
BEGIN:VEVENT
DTSTART;VALUE=DATE:20221025
DTEND;VALUE=DATE:20221026
DTSTAMP:20220511T141314Z
CREATED:20220511T141231Z
LAST-MODIFIED:20220511T141314Z
UID:18772-1666656000-1666742399@desn.org.uk
SUMMARY:Promoted Event: Hardware Pioneers Max 2022
DESCRIPTION:Hardware Pioneers Max 2022\nRegisterONE DAY WORTH ONE YEAR\nOur goal is to help you accelerate your success.\nAt Hardware Pioneers Max you have the unique opportunity to meet with a community of leading experts and suppliers that can help you to learn faster\, make better decisions and speed up your product development process. \nLearn\nGain actionable advice from the brightest minds in IoT on how to design\, build\, connect and manage your IoT product. Get up to date with the latest trends and advancements in the sector\, and learn how to avoid costly mistakes that can slow down your development process. \nConnect\nMeet other pioneering technical leaders\, product managers\, engineers and entrepreneurs who are building the next generation of IoT products. \nDo business\nDiscover the newest products and services to design\, build\, connect and manage your IoT devices. Find the latest and greatest hardware and software technologies to implement in your IoT device. Meet the partners that can help your \n\nFind out more at \nhttps://www.hardwarepioneers.com
URL:https://desn.org.uk/event/promoted-event-hardware-pioneers-max-2022/
LOCATION:London
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END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=UTC:20221019T090000
DTEND;TZID=UTC:20221019T170000
DTSTAMP:20221004T103705Z
CREATED:20220715T150841Z
LAST-MODIFIED:20221004T103705Z
UID:18893-1666170000-1666198800@desn.org.uk
SUMMARY:FPGA Frontrunner Meet and Greet
DESCRIPTION:FPGA Frontrunner Meet & Greet\nRegisterDESN is pleased to announce the next FPGA Front Runners event – to he hosted by Rolls Royce at their Engine Controls facility in Solihull on October 19th . \nThe FPGA Front runners is all about bringing together the UK FPGA & ASIC design communities to discuss all things gate array. Share knowledge\, find out what is going on and network with like minded people. \nThis event brings something new to the group\, hosted at a member site\, and allowing us more space for networking. There will be a mini expo with members promoting their products and services to the group. \nWe are also inviting students from across the UK to the event\, to bring them closer to the community\, for them to understand about the world of FPGAs and meet our members who are actively seeking graduates. \nA factory tour will be arranged for the students\, there maybe some extra places available – so when registering\, please list your interest in a site tour. \nSpeakers will be announced nearer the time. \nEveryone is welcome\, come along and get involved in what is becoming a vibrant UK community for FPGA & ASIC design engineers. \nSpeakers\nDave Sanders\, Rolls-Royce\nDave Sanders is an Associate Fellow at Rolls-Royce specialising in the development of complex electronic hardware. He has 25 years’ experience working in the electronics industry\, with 22 of those developing the safety critical microprocessors that form the heart of the Rolls-Royce control systems for both aerospace and non-aerospace applications. \nRead More \nDave is a member of the European DO254 Users Group since 2012 and has contributed to various regulation working groups including co-authoring AMC 20-152A. He became a Fellow of the IET in 2018 and was awarded the Rolls-Royce Controls Gold Innovation Award in 2015 in recognition of the successful development of the sixth-generation safety critical microprocessor\, which has already accumulated over 20 million fault free flying hours. \nIn his spare time\, Dave is a keen runner and currently men’s captain for Lichfield running club. \n\nHarald Werner\, Efinix Inc.\nHarald Werner has over 30 years’ experience in the electronic industry. \nHe received an Dipl.- Ing (FH) at the FH Koblenz. \nHe started his career in 1987 at Siemens AG\, in 1992 he joined the EDA industry at Viewlogic Systems in 1995 he started the career in the semiconductor industry at Actel\, following in 2000 with Lattice Semiconductor and since 2020 he joined Efinix Inc. as European Sales Director. \nAdam Taylor\, Adiuvo Engineering & Training Ltd\nAdam Taylor is a world recognised expert in design and development of embedded systems and FPGA’s for several end applications. Throughout his career\, Adam has used FPGA’s to implement a wide variety of solutions from RADAR to safety critical control systems (SIL4) and satellite systems. He also had interesting stops in image processing and cryptography along the way. Adam has held executive positions\, leading large developments for several major multinational companies. \nRead More \nFor many years Adam held significant roles in the space industry he was a Design Authority at Astrium Satellites (Now Airbus Space) Payload processing group for six years and for three years he was the Chief Engineer of e2v Space Imaging\, being responsible for several game changing projects.\nAdam has held executive positions\, leading large developments for several major multinational companies. For many years Adam held significant roles in the space industry he was a Design Authority at Astrium Satellites (Now Airbus Space) Payload processing group for six years and for three years he was the Chief Engineer of e2v Space Imaging\, being responsible for several game changing projects. \nFPGAs are Adam ‘s first love\, he is the author of numerous articles and papers on electronic design and FPGA design including over 400 blogs and 25 million plus views on how to use the Zynq and Zynq MPSoC for Xilinx.\nAdam is Chartered Engineer\, Senior Member of the IEEE\, Fellow of the Institute of Engineering and Technology\, Visiting Professor of Embedded Systems at the University of Lincoln and Arm Innovator\, Edge Impulse Ambassador\, he is also the owner of the engineering and consultancy company Adiuvo Engineering and Training \n\nAmanda Brock\, OpenUK\nAmanda Brock is CEO of OpenUK\, the UK organisation for the business of Open Technology in the UK – open source software\, open hardware and open data – with a purpose of UK Leadership and International Collaboration in Open Technology. \nShe is a Board Member of the Open Source Initiative; appointed member of the Cabinet Office’s Open Standards Board; Member of the British Computer Society Inaugural Influence Board; Advisory Board Member\, KDE\, Planet Crust\, Sustainable Digital Infrastructure Alliance and Mimoto; Charity Trustee Creative Crieff and GeekZone; and European Representative of the Open Invention Network. \nRead More \nA lawyer of 25 years’ experience\, she previously chaired the Open Source and IP Advisory Group of the United Nations Technology Innovation Labs\, sat on the OASIS Open Projects and UK Government Energy Sector Digitalisation Task Force. Advisory Boards. She was General Counsel of Canonical for 5 years from 2008 and set up their legal function. \nAmanda was awarded the UK Lifetime Achievement Award in the Women\, Influence & Power in Law Awards 2022\, and included in Computer Weekly’s Most Influential Women in Tech Long list in 2021 and 2022 and in their UK Tech50 Influencers longlist for 2022. \nShe is the editor of Open Source\, Law\, Policy and Practice second edition being published by Oxford University Press in October 2022 and with open access thanks to the Vietsch Foundation. \nlinkedin.com/in/amandabrocktech/\n@openuk_uk @amandabrockUK \n\nAndy Darlington\, Renishaw\nAndy is a senior design engineer working within Renishaw’s encoder division on new product development. \nHe specialises in FPGA and VHDL with a particular interest in improving our team’s development processes. \nRead More \nPresentation Title:  Applying Continuous Integration to VHDL Development \nUsing VUnit and Azure DevOps to apply continuous integration and continuous delivery practices to VHDL development.
URL:https://desn.org.uk/event/fpga-frontrunner-meet-and-greet/
LOCATION:Rolls Royce\, Solihull\, B37 7YP
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END:VEVENT
BEGIN:VEVENT
DTSTART;VALUE=DATE:20221013
DTEND;VALUE=DATE:20221015
DTSTAMP:20220511T141911Z
CREATED:20220511T141911Z
LAST-MODIFIED:20220511T141911Z
UID:18783-1665619200-1665791999@desn.org.uk
SUMMARY:Promoted Event: Frontier Deep Tech Conference
DESCRIPTION:Frontier Deep Tech Conference\nRegisterLEARN FROM THE BRIGHTEST MINDS IN THE WORLD\nGet a complete vision of DEEP TECH in all its diversity\, challenges and complexity through the most exciting TOPICS in today’s innovative technologies \nEurope’s leading deep tech event welcomes you to London\, 13-14th October 2022. \nQUANTUM COMPUTINGExplore the past\, present and future of quantum technologies and what they will bring to tomorrow’s society. \nAI & ROBOTICSUnderstand the implications of artificial intelligence and shape your innovation mindset with top level speakers. \nSEMICONDUCTORSDiscover the challenges of this sector to overcome and the benefits for society and our planet. \nCLIMATE & ENERGYSoftware alone can’t solve today’s energy and climate crisis: immerse yourself in new technologies that can. \nSPACE & TRANSPORTATIONLearn all form Smart Cities and IoT to logistics\, and from new propelling engines to satellites and eTVOL.! \nFind out more at \nhttps://frontierdeeptech.com/
URL:https://desn.org.uk/event/promoted-event-frontier-deep-tech-conference/
LOCATION:London
CATEGORIES:Promoted Event
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END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=UTC:20220713T093000
DTEND;TZID=UTC:20220713T170000
DTSTAMP:20220728T132609Z
CREATED:20220608T104348Z
LAST-MODIFIED:20220728T132609Z
UID:18794-1657704600-1657731600@desn.org.uk
SUMMARY:FPGA Frontrunner Meet & Greet
DESCRIPTION:FPGA Frontrunner Meet & Greet\nRegisterAgendaThe DESN FPGA Frontrunners event returns to The Moathouse – July 13th. Bringing together the UK FPGA & ASIC design communities to discuss all things gate array. Share knowledge\, find out what is going on and have a moan about the current state of affairs. All set within the beautiful Moathouse Inn. Lots of time to network\, have a coffee and at the end of the day a beer with colleagues and members with a shared common interest. \nThe event will be similar to that in March\, we will have a morning session of discussion around some key topics – followed by some interesting presentations from Gowin Semiconductor\, finding out a bit more about the products and roadmap\, represented by WPG – so will be interesting to hear how they plan to promote Gowin and their general plans for UK distribution. \nSomething close to everyone’s heart is staffing\, how to find new and existing design engineers and then when you have them\, how to keep them. We have IC resources along to share their thoughts and ideas on this. \nDirk Koch from Manchester University is going to explain all about their Open Source FPGA solution with their FABulous FPGA program. Then we have a talk from one of our sponsors – Synopsys. \nEveryone is welcome\, come along and get involved in what is becoming a vibrant UK community for FPGA & ASIC design engineers. \nImages from this event\nSpeakers\nNeil Dickins\, Co-Founder\, IC Resources\nIn 1999\, a weak link existed in the UK technology industry’s internal supply chain: there was no recruitment partner working in the best long term interests of the technology community. As a co-founder of IC Resources\, Neil started the business with the vision of helping individuals (our candidates) and companies (our clients) to achieve their long term ambitions within a prosperous and exciting sector… \nFIND OUT MORE×Neil Dickins\, IC Resources\nStaying true to our vision is the only real business decision he ever made or\, now\, makes. Candidates love to have someone acting as their personal ‘agent’ and customers always value expertise and insight-led services. Our hard work and industry commitment have enabled us to become the recognised recruitment partner to the global technology community. \nNeil now has the opportunity to focus on his professional passions\, including: 1) Ensuring that we maintain the highest level of quality and customer service while we grow the company. 2) Working with NMI as their link to government on visa and immigration issues. 3) Evangelising recruitment ‘best practice’ and how the right strategies can support business success and 4) Sponsoring and participating in high profile industry conferences and supporting UKESF\, the skills foundation. \nOn a personal level\, Neil still manages to get himself up and down the basketball court occasionally and has re-engaged with the Questors Theatre after 13 years away from ‘the boards’. He is also very intrigued by the intrinsic transformational potential of silly hats. \nPresentation: Find People? Great Problem! \nNeil will discuss the reasons for the industry-wide skills shortage\, followed by advice on strategies to maximise the probability of attracting and securing the best hires \nNigel Watts\, President EMEA\, WPG Holdings\nI Started my career in the Electronics industry as a trainee design engineer for GEC Semiconductors in 1978\, Joined Memec in 1983\, Sales\, Marketing and Management. Started Spectrum on December 1994 with Gamil Haddad\, a Rep company that we expanded to become the first pan European Representative business in 2003. Renamed Ismosys in 2008 went on to expand into India and USA. Sold to Astute Electronics in April 2021 to become President EMEA for WPG Holdings… \nFIND OUT MORE×Nigel Watts\, President\, EMEA\nI am passionate about demand creation and finding innovative and creative ways to solving customer issues and enhancing the experience for all parties concerned. \nPresentation: WPG – “Rising in the East\, Settling In The West” \nWhy have WPG decided to globalise and what advantages does it bring to European customers ? \n1. Access to emerging Asian / Chinese technologies – e.g Gowin ( and many others ). With control of the relationship both “locally” and internationally.\n2. Ability to track and also transport designs from Europe to Asian based CEM/EMS where we have long standing relationships.\n3. The financial backing of the world’s largest semiconductor distributor \, lines and inventory.\n4. A “wake up call” to others.\n5. Creative and innovative ways of delivering solutions and services to the design community. \nPiyush Sukhija\, Synopsys\nPiyush has been working for Synopsys for last 9 years and look after Verification SW activity in UK region. Working closely with sales to support customers\, collaborate with wider industry to understand complex verification challenges and work with Synopsys R&D to make improvement in Synopsys Verification offerings… \nFIND OUT MORE×Piyush Sukhija\, Synopsys\nPresentation: Accelerating FPGA verification \nDiscussion on Industry-leading design\, debug\, simulation and synthesis for accelerating verification closure
URL:https://desn.org.uk/event/fpga-frontrunner-meet-greet-2/
LOCATION:The Moat House\, Lichfield Street\, Tamworth\, B79 7QQ
CATEGORIES:Past Event Spotlight
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END:VEVENT
BEGIN:VEVENT
DTSTART;VALUE=DATE:20220705
DTEND;VALUE=DATE:20220707
DTSTAMP:20220408T141745Z
CREATED:20220408T114721Z
LAST-MODIFIED:20220408T141745Z
UID:18734-1656979200-1657151999@desn.org.uk
SUMMARY:IMAPS-UK Event: Centre for Power Electronics Annual Conference
DESCRIPTION:IMAPS-UK Event: Centre for Power Electronics Annual Conference\nRegisterThe Centre for Power Electronics (CPE) Annual Conference will bring together the Power Electronics\, Machines and Drives Community to review the latest Research and Development that will impact the Electric Revolution. \nThe attendees are offered exceptional value at attractive prices to participate in the Conference with support from the Centre for Power Electronics (www.powerelectronics.ac.uk)\, focusing on encouraging Students and Early Career Researchers to demonstrate their ideas and network with the PEMD community.
URL:https://desn.org.uk/event/imaps-uk-event-centre-for-power-electronics-annual-conference/
LOCATION:University of Warwick\, Gibbet Hill Road\, Coventry\, CV4 7AL\, United Kingdom
CATEGORIES:DESN Promoted Event
ATTACH;FMTTYPE=image/jpeg:https://desn.org.uk/wp-content/uploads/2022/04/imaps1.jpg
END:VEVENT
BEGIN:VEVENT
DTSTART;VALUE=DATE:20220616
DTEND;VALUE=DATE:20220617
DTSTAMP:20220408T115507Z
CREATED:20220408T115157Z
LAST-MODIFIED:20220408T115507Z
UID:18744-1655337600-1655423999@desn.org.uk
SUMMARY:IMAPS-UK Event: PEPTUS Training Workshop
DESCRIPTION:IMAPS-UK Event: PEPTUS Training Workshop\nRegisterIMAPS-UK is organising a full-day Power Electronics Packaging Training Workshop to provide a basic understanding of the design\, testing and reliability issues involved in the assembly of power electronics components and modules that will form the basis of the Electric Revolution. \nThis workshop will focus on the fundamental aspects of power electronics packaging\, explaining the design considerations\, exploring the testing and reliability aspects and introducing the trends towards advanced packaging. This workshop will be complemented with a tour of the facilities at the CSA Catapult.
URL:https://desn.org.uk/event/imaps-uk-event-peptus-training-workshop/
LOCATION:CSA Catapult\, Innovation Centre\, Newport\, Duffryn\, NP10 8UL\, United Kingdom
CATEGORIES:DESN Promoted Event
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END:VEVENT
BEGIN:VEVENT
DTSTART;VALUE=DATE:20220519
DTEND;VALUE=DATE:20220520
DTSTAMP:20220419T095323Z
CREATED:20220419T094540Z
LAST-MODIFIED:20220419T095323Z
UID:18759-1652918400-1653004799@desn.org.uk
SUMMARY:ECS: The Electronic Component Show
DESCRIPTION:ECS: The Electronic Component Show\nRegisterThis new one-day event offers the opportunity for design engineers and purchasing professionals to network with electronic manufacturers\, distributors and service providers to source new products\, solutions and contacts. \nECS is a one day table top event that has been launched for those who design\, source and buy electronic components & associated services. \nOrganised by MMG Publishing\, publisher of Electronics Sourcing and eBOM. com\, the event aims to bring together the industry’s leading manufacturers and distributors with design engineers and purchasing professionals. \nOffering an informative dual seminar program\, this one day event is the place where ideas will be shared\, meaningful conversations will be had and business relationships can start or be strengthened. \nTo be held on Thursday 19th May 2022 at the Kassam Stadium (Oxford United FC) in Oxford; this central location is easily accessible with ample free car parking and local train stations.
URL:https://desn.org.uk/event/ecs-the-electronic-component-show/
LOCATION:Kassam Stadium\, Littlemore\, Oxford\, OX4 6DE
CATEGORIES:DESN Promoted Event
ATTACH;FMTTYPE=image/jpeg:https://desn.org.uk/wp-content/uploads/2022/04/ecs.jpg
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=UTC:20220510T091500
DTEND;TZID=UTC:20220510T170000
DTSTAMP:20220411T151724Z
CREATED:20220411T151724Z
LAST-MODIFIED:20220411T151724Z
UID:18751-1652174100-1652202000@desn.org.uk
SUMMARY:Raising Partners Live: Funding in Focus 2022
DESCRIPTION:Raising Partners Live: Funding in Focus 2022\nRegisterRaising Partners Live is hosting this full day event at the Technology & Innovation Centre\, University of Strathclyde\, Glasgow\, bringing together investors and entrepreneurs to advance the entrepreneurial ecosystem by empowering start-up and scale-up tech business to access capital. \nThe one-day conference will focus on everything you need to know about raising investment. Hear from an array of world-class speakers\, participate in practical workshops\, meet investors\, and pitch your business to the professionals. \n Limited free tickets available: Raising Partners Live – Raising Partners Live 2022
URL:https://desn.org.uk/event/raising-partners-live-funding-in-focus-2022/
LOCATION:University of Strathclyde\, 16 Richmond Street\, Glasgow\, G1 1XQ
CATEGORIES:DESN Promoted Event
ATTACH;FMTTYPE=image/jpeg:https://desn.org.uk/wp-content/uploads/2022/04/fif3.jpg
END:VEVENT
BEGIN:VEVENT
DTSTART;VALUE=DATE:20220426
DTEND;VALUE=DATE:20220427
DTSTAMP:20220408T093743Z
CREATED:20220408T090018Z
LAST-MODIFIED:20220408T093743Z
UID:18635-1650931200-1651017599@desn.org.uk
SUMMARY:CadenceTECHTALK: Accelerating Complex SoC Prototyping with Protium X2
DESCRIPTION:CadenceTECHTALK: Accelerating Complex SoC Prototyping with Protium X2\nRegisterThis CadenceTECHTALK will offer an overview of the Protium™ Enterprise Prototyping Platform for fast hardware and software verification.\nWe will review the traditional prototyping challenges of complex SoCs using a 5G AI-enabled mobile SoC case study—RTL changes required for clocks management\, memories\, interfaces\, multi-FPGA partitioning\, and multi-user support. Learn how the Protium X2 platform features and solutions solve these challenges while accelerating the hardware/software co-design verification schedule.
URL:https://desn.org.uk/event/cadencetechtalk-accelerating-complex-soc-prototyping-with-protium-x2/
LOCATION:Webinar
CATEGORIES:DESN Promoted Event
ATTACH;FMTTYPE=image/jpeg:https://desn.org.uk/wp-content/uploads/2022/04/cadtt2604.jpg
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Europe/London:20220323T093000
DTEND;TZID=Europe/London:20220323T183000
DTSTAMP:20220408T090730Z
CREATED:20220125T175606Z
LAST-MODIFIED:20220408T090730Z
UID:18119-1648027800-1648060200@desn.org.uk
SUMMARY:FPGA Frontrunner Meet & Greet
DESCRIPTION:FPGA Frontrunner Meet & Greet\nAgendaNMI is all about sharing knowledge and creating communities. The FPGA Front Runners exists to share knowledge\, best practice and to create a community around FPGAs and ASIC development.\nEach event is about networking\, meeting colleagues\, grabbing a coffee and some cake and listening to presentations from suppliers and your peers. \nThe event is designed to create a community of likeminded engineers\, and is run by members for members and the subjects and presentations are chosen by the members\, so remain valid. \nThe ultimate aim is to create a better awareness of FPGAs & ASICs in the UK\, drive best practice\, identify common issues and challenges and work together to resolve them. This first event is designed to bring together the community\, discuss the current market conditions around FPGAs\, the issues and technical challenges each member needs to overcome. Look at the skills shortages and what is needed to improve the engineers use of FPGAs. Everyone is welcome and we encourage you to attend and get involved. \nEvents are planned to run quarterly\, with other events or webinars in between as suggested by the community. \nAdam Taylor\nAdiuvo Engineering & Training Ltd \nAdam Taylor is a world recognised expert in design and development of embedded systems and FPGA’s for several end applications. \n×Adam Taylor\, Adiuvo Engineering & Training Ltd\nAdam Taylor is a world recognised expert in design and development of embedded systems and FPGA’s for several end applications. Throughout his career\, Adam has used FPGA’s to implement a wide variety of solutions from RADAR to safety critical control systems (SIL4) and satellite systems. He also had interesting stops in image processing and cryptography along the way. Adam has held executive positions\, leading large developments for several major multinational companies. For many years Adam held significant roles in the space industry he was a Design Authority at Astrium Satellites (Now Airbus Space) Payload processing group for six years and for three years he was the Chief Engineer of e2v Space Imaging\, being responsible for several game changing projects.\nFPGAs are Adam ‘s first love\, he is the author of numerous articles and papers on electronic design and FPGA design including over 400 blogs and 25 million plus views on how to use the Zynq and Zynq MPSoC for Xilinx. \nAdam is Chartered Engineer\, Senior Member of the IEEE\, Fellow of the Institute of Engineering and Technology\, Visiting Professor of Embedded Systems at the University of Lincoln and Arm Innovator\, Edge Impulse Ambassador\, he is also the owner of the engineering and consultancy company Adiuvo Engineering and Training. \nPresentation: PYNQ – FPGA with Python \nRead MoreSteve Drew\nNMI Electronic Systems \nSteve has over 30 years of semiconductor\, electronics and design industry experience. \n×Steve Drew\, NMI Electronic Systems\nSteve has over 30 years of semiconductor\, electronics and design industry experience. Starting his career at Avnet\, he became one of their youngest product managers – looking after Xilinx for the UK. Steve subsequently worked at a number of niche component distributors\, promoting and selling \, technical component solutions\, ranging from video codecs\, power products and FPGAs\, through to connectivity and display solutions. FPGA’s became his thing in the 1990’s and Steve worked with all the FPGA manufacturers except Altera. Moving on from component distribution Steve has worked at component kitting and PCB assembly companies\, and having worked for large multinational companies and smaller privately owned businesses\, has given Steve a wide view of the component market place and the challenges faced by companies\, and having run his own manufacturing consultancy since 2020 has given him an understanding of the small business sector. \nSteve loves the electronics industry and technology in general\, is passionate about UK manufacturing and how we can build more here instead of losing it to offshore competition\, is a champion of startup’s and innovation. And if you want an opinion on something\, just ask him \nRead MoreTony Holmes\nCadence \nTony started his career at Digital Equipment in the design & development of Computer Special Systems then moved into the Design and Development of High Performance Bridge Routers. \n×Tony Holmes\, Cadence\nTony started his career at Digital Equipment in the design & development of Computer Special Systems then moved into the Design and Development of High Performance Bridge Routers\, followed by creating a System Level Testing group to test these Bridge/Routers in complex networking scenarios. \nTony moved to Quickturn Design Systems before Quickturn merged with Cadence Design Systems. Tony is a Technical Director at Cadence Design Systems with a long history of focussing primarily on HW based verification using Emulation and FPGA Prototyping. \nTony has responsibility for Technical Engagements for any HW based verification project/engagement within EMEA. \nPresentation:  500M Gates in FPGAs (FPGA Prototyping) \nA few years ago the concept of running Billions of gates on an FGPA System would have been mind boggling. \nThis Cadence Presentation will offer an overview of the Protium™ Enterprise Prototyping Platform for fast hardware and software verification.\nWe will review the traditional prototyping challenges of complex SoCs using a 5G AI-enabled mobile SoC case study—RTL changes required for clock management\, memories\, interfaces\, multi-FPGA partitioning\, and multi-user support. \nYou will learn how the Protium X2 features and solutions solve these challenges while accelerating the hardware/software co-design verification schedule. \nRead MoreMyrtle Shah \nFounder\, Chipflow \nMyrtle is an engineer and founder at ChipFlow\, working on a reliable end-to-end open source flow for building chips. \n×Myrtle Shah\, Chipflow\nMyrtle is an engineer and founder at ChipFlow\, working on a reliable end-to-end open source flow for building chips. They are also the lead developer of nextpnr\, an open source FPGA place and route tool\, and the creator of the Project Trellis bitstream documentation and open flow for Lattice ECP5 FPGAs. They enjoy walking and gardening in their spare time when they need to get away from computers. \nPresentation:  OS RISC V SoC built with Python \nBy combining Amaranth\, a Python-based framework for describing and constructing hardware\, with a stack of other open source tools\, it’s possible to build complex SoCs not just for FPGAs but also taped out as chips. We’ll be having a look at the ecosystem for both as it stands today; some examples of projects using it including the journey to a tapeout-ready\, Linux-capable RISC-V SoC on the Skywater 130nm process; and what the future of open tooling might look like. \nRead More
URL:https://desn.org.uk/event/fpga-frontrunner-meet-greet/
CATEGORIES:Past Event
ATTACH;FMTTYPE=image/jpeg:https://desn.org.uk/wp-content/uploads/2022/01/NMIES-FPGA2.jpg
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Europe/London:20220317T120000
DTEND;TZID=Europe/London:20220317T190000
DTSTAMP:20220408T090730Z
CREATED:20220128T161320Z
LAST-MODIFIED:20220408T090730Z
UID:18153-1647518400-1647543600@desn.org.uk
SUMMARY:Technology Start-Up Event
DESCRIPTION:Technology Start-Up Event\nOur joint Silicon Catalyst and TechWorks event was conceived to help founders learn about the forming\, storming\, norming and then performing of UK semiconductor startup companies. \nWe had the great Malcolm Penn take us through the concept that no company is an island when testing their value proposition. \nWe kicked off with Phillip Burr describing the hugely generous Arm (a Silicon Catalyst strategic partner and In Kind Partner) Flexible Access program that releases the potential of semiconductor startup designers to get market leading design IP. \nTwo legends of our UK semiconductor startups Phil O’Donovan co-founder CSR Plc and Jerry Loraine talked about “how bad things happen to good people” with stories about patent trolls and go to market challenges. \nThis led naturally into “the importance of the team” with a single person invention idea from Bruno Johnson. Where Cascoda invented a radio architecture to increase range by 3x for Thread Group #iotdevices & is now shipping Arm based products into #smartcities #smartbuildings all around the world.\nThis section concluded with a compelling presentation from the illustrious Jim Nicholas walking us through the inventive team idea from Uniphy Ltd \nThe last session before the break had the wonderful Vaysh Kewada from Salience Labs (a Silicon Catalyst portfolio company) share her deep insights into “creating relentlessly repeatable processes from day 1” of your startup journey. Followed by a hugely insightful deep dive by Pete Hughes the foremost semiconductor product operations executive in the UK on how to ship high volume semiconductor products with the level of quality that your market leading customers will demand. \nBack from the break where the Arm catering team laid on a spread that would not look out of place at the Ritz\, we leapt into “what problem are you solving?” Patrick Camilleri shared his learnings on how to build semiconductor design IP combined SaaS product offerings and then Gary Spittle founder of Sonical Inc (A Silicon Catalyst portfolio company) projected the huge opportunity in their end to end system play to command the compute in the ear application space. \nWe concluded the presentations with the eternal “how much money will you need?” The marvellous Tony Milbourn who leads u-blox corporate venturing shared in detail how they look for the secret sauce of semiconductor startup success. Then Owen Metters Foresight Group Williams\, the leading semiconductor VC investor in the UK took us through three compelling case studies. \nThe final panel session lead us into a lively debate into what we need to do to make UK Semiconductor great again and make sure we create an open and inclusive industry where everybody can thrive.
URL:https://desn.org.uk/event/technology-start-up-event/
CATEGORIES:FREE for All,NMI Event,Past Event
ATTACH;FMTTYPE=image/gif:https://desn.org.uk/wp-content/uploads/2022/01/NMIESTSUE.gif
END:VEVENT
BEGIN:VEVENT
DTSTART;VALUE=DATE:20220309
DTEND;VALUE=DATE:20220310
DTSTAMP:20220728T125841Z
CREATED:20220218T133517Z
LAST-MODIFIED:20220728T125841Z
UID:18335-1646784000-1646870399@desn.org.uk
SUMMARY:Synopsys: Early and Accelerated SoC Connectivity Verification using VC Formal Connectivity Checking App
DESCRIPTION:Synopsys: Early and Accelerated SoC Connectivity Verification using VC Formal Connectivity Checking App\nRegisterComplex bus protocols\, increased on-chip functionalities\, coupled with limited shared I/O resources\, result in complex wiring connections in SoCs with numerous muxing schemes.\nSimulation and structural analysis approaches require huge effort and may lead to bug escapes making them inefficient for SoC connectivity verification. Connectivity verification using formal techniques is exhaustive and helps making designs immune to connectivity bug escapes. \nFor over a decade\, VC Formal Connectivity Checking App has become an essential part of the verification toolkit used by leading edge technology companies. Its ability to scale with the ever increasing SoC design sizes\, its performance and ease of use\, and its optimized debugging capabilities\, make it a market leader in this space. \nJoin us to learn about SoC connectivity challenges and how Synopsys’ innovative technologies can help you catch and debug sneaky wiring mistakes early with 100% confidence and ease.
URL:https://desn.org.uk/event/synopsys-early-and-accelerated-soc-connectivity-verification-using-vc-formal-connectivity-checking-app/
CATEGORIES:Past Event,Promoted Event
ATTACH;FMTTYPE=image/png:https://desn.org.uk/wp-content/uploads/2022/02/synweb2.png
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Europe/London:20220303T120000
DTEND;TZID=Europe/London:20220303T123000
DTSTAMP:20220408T091436Z
CREATED:20220207T153850Z
LAST-MODIFIED:20220408T091436Z
UID:18174-1646308800-1646310600@desn.org.uk
SUMMARY:Rules of Origin when exporting to the EU
DESCRIPTION:RULES OF ORIGIN WHEN EXPORTING TO THE EU\nRegister for FREEWhere your product comes from or is made\, can have a huge impact on the tariffs applicable when selling to another country. Ensuring your goods comply with the rules of origin in the EU/UK Trade & Cooperation Agreement is essential for you to export your product smoothly and avoid costly errors.\nAs of 1st January 2022\, to benefit from the reduced rate of Customs Duty\, all companies exporting goods to the EU must be able to prove that their goods are of UK/EU origin – it is no longer sufficient to make a declaration on your commercial invoice. Inability to do so may result in delays\, demands for duty and even penalties. \nThis essential one-hour webinar led by TechWorks and The International Trade Consultancy will cover: \n\nWhat are rules of origin?\nWhich rules of origin apply to my products?\nHow can I check if they comply?\nHow can I prove they comply?\nWhat should I do if they don’t comply?\nWhat is cumulation and does it apply to me?\n\nHosted by\nLucinda O’Reilly \nLucinda O’Reilly is an international trade consultant with over 10 years’ experience of global imports and exports. As the Exports Director of Ecotile Flooring she developed a successful UK focused manufacturing company to export to over 40 countries worldwide. Having successfully managed Ecotile’s transition through Brexit Lucinda set up The International Trade Consultancy to provide support to companies struggling to navigate the new regulatory landscape and supply chain challenges caused by the pandemic.
URL:https://desn.org.uk/event/rules-of-origin-when-exporting-to-the-eu/
CATEGORIES:NMI Event,Past Event
ATTACH;FMTTYPE=image/jpeg:https://desn.org.uk/wp-content/uploads/2022/02/webinarv2.jpg
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=UTC:20220223T080000
DTEND;TZID=UTC:20220406T170000
DTSTAMP:20220728T131600Z
CREATED:20220217T192307Z
LAST-MODIFIED:20220728T131600Z
UID:18334-1645603200-1649264400@desn.org.uk
SUMMARY:Cadence TECHTALK Series: Adopting a Faster\, More Efficient Path to Multi-Chiplet Design
DESCRIPTION:Cadence TECHTALK Series: Adopting a Faster\, More Efficient Path to Multi-Chiplet Design\nRegisterWith the increasing popularity of multi-chiplet designs that address Moore’s law slowdown and reticle size limitations\, leading foundries are offering multiple advanced packaging and die stacking options for different applications.\nEDA companies have had to innovate to provide integrated and IC-centric tools while building accurate system-level models to find the fastest and most efficient path for 3D-IC design and analysis. \nIn this four-part CadenceTECHTALK series\, learn how to properly plan and implement stacked digital SoCs\, analog/mixed-signal designs\, and entire 2.5-D/3-D systems\, including meeting system-level power and thermal analysis requirements through an integrated 3D-IC solution.
URL:https://desn.org.uk/event/cadence-techtalk-series-adopting-a-faster-more-efficient-path-to-multi-chiplet-design/
CATEGORIES:Past Event
ATTACH;FMTTYPE=image/jpeg:https://desn.org.uk/wp-content/uploads/2022/02/cad3.jpg
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Europe/London:20220217T120000
DTEND;TZID=Europe/London:20220217T123000
DTSTAMP:20220408T092109Z
CREATED:20220207T154453Z
LAST-MODIFIED:20220408T092109Z
UID:18164-1645099200-1645101000@desn.org.uk
SUMMARY:Commodity Codes and Import Declarations
DESCRIPTION:COMMODITY CODES AND IMPORT DECLARATIONS\nRegister for FREEOn January 1st 2022\, two changes came into effect that importers and exporters should be aware of. The World Customs Organisation updated the Harmonised System so there have been a number of changes to commodity codes\, especially for electronic products.\nFull import declarations are now required for all goods entering GB from the EU at point of import and a new digital system is in place to manage the increase in data. \nThis essential 30 minute webinar led by TechWorks and The International Trade Consultancy will cover: \n\nWhat are commodity codes?\nHow can I check my commodity codes are still correct?\nWhat do I need to do if they’ve changed?\nHow does the new import declaration system work?\nHow will it affect my business?\n\nHosted by\nLucinda O’Reilly \nLucinda O’Reilly is an international trade consultant with over 10 years’ experience of global imports and exports. As the Exports Director of Ecotile Flooring she developed a successful UK focused manufacturing company to export to over 40 countries worldwide. Having successfully managed Ecotile’s transition through Brexit Lucinda set up The International Trade Consultancy to provide support to companies struggling to navigate the new regulatory landscape and supply chain challenges caused by the pandemic.
URL:https://desn.org.uk/event/commodity-codes-and-import-declarations/
CATEGORIES:NMI Event,Past Event
ATTACH;FMTTYPE=image/jpeg:https://desn.org.uk/wp-content/uploads/2022/02/webinarsv1.jpg
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Europe/London:20220210T180000
DTEND;TZID=Europe/London:20220210T190000
DTSTAMP:20220408T091929Z
CREATED:20220121T134734Z
LAST-MODIFIED:20220408T091929Z
UID:18107-1644516000-1644519600@desn.org.uk
SUMMARY:Synopsys: 3DIC Design from Concept to Silicon
DESCRIPTION:Synopsys: 3DIC Design from Concept to Silicon\nREGISTERFor some high-performance computing (HPC) designs\, monolithic SoCs aren’t producing the scalability and yield that designers are looking for. New trends towards 3DIC design are emerging introducing new design challenges\, such as reliable die-to-die connectivity\, high bandwidth memory\, integration\, and 2.5D or 3D packaging options. This webinar will outline the different market trends for 3DIC designs and explain how designers can maintain such new trends to deliver their designs with optimized latency\, power\, performance\, and area. We will also demonstrate the construction of a 3DIC design and our 3rd generation HBM interposer auto-routing solution. \nAttendees will: \n\nLearn about considerations and trends for a more efficient 3DIC design integration\nFind out how protocols like HBM3 and Die-to-Die are influencing 3DIC designs\nSee a demo of a 3DIC design construction\n\nSPEAKERS\nKenneth Larsen is a product marketing director in the Silicon Realization Group at Synopsys. He is a versatile leader with a strong background in defining and executing product vision\, marketing strategy\, inspiring product development teams\, translating technology concepts into customer solutions\, developing high-performance global organizations\, conceiving and driving new and emerging products to scale from the ground up\, guiding marketing\, and enabling sales. Kenneth has a degree in electrical engineering and additional coursework in strategic growth at Columbia Business School\, and Artificial Intelligence at MIT Sloan School of Management. \nEric Means is an Applications Engineer in Hillsboro\, Oregon supporting Synopsys 3DIC Compiler users. He has worked with ASIC and EDA customers for 25 years at NEC\, Renesas\, & Synopsys. He has a BS in Electrical Engineering from Washington State University and an MS in Computer Engineering from the Oregon Graduate Institute. \n*This webinar is in partnership with SemiWiki and Synopsys*
URL:https://desn.org.uk/event/synopsys-3dic-design-from-concept-to-silicon/
CATEGORIES:Past Event,Promoted Event
ATTACH;FMTTYPE=image/jpeg:https://desn.org.uk/wp-content/uploads/2022/01/3DIC-Design-from-Concept-to-Silicon-Max-Quality.jpg
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Europe/London:20220209T173000
DTEND;TZID=Europe/London:20220209T180000
DTSTAMP:20220728T130826Z
CREATED:20220121T135503Z
LAST-MODIFIED:20220728T130826Z
UID:18110-1644427800-1644429600@desn.org.uk
SUMMARY:Synopsys: Exploring a Software First Approach to Avoid SoC Re-spins
DESCRIPTION:Synopsys: Exploring a Software First Approach to Avoid SoC Re-spins\nREGISTERTraditional coverage-based verification methods are no longer sufficient to verify complex SoCs integrating many processor cores and IP subsystems.  To conquer the verification challenge of complex SoCs\, companies are shifting their development paradigm to a software first approach.  By considering the target software up front\, as a critical part of the SoC development process\, designs teams are able to signoff a new SoC for production with high confidence. \nIn this Synopsys webinar we will cover the primary pre-silicon methods\, along with their benefits\, to execute a software first strategy: \n– Virtual prototyping\n– Emulation\n– FPGA-based prototyping \nThrough the example of a production processor design project\, we will provide insight into each methodology and how it helps to accelerate verification coverage.  This event is hosted by a software first methodology expert and aimed at verification and software teams working on next-generation SoC designs.
URL:https://desn.org.uk/event/synopsys-exploring-a-software-first-approach-to-avoid-soc-re-spins/
CATEGORIES:Past Event
ATTACH;FMTTYPE=image/png:https://desn.org.uk/wp-content/uploads/2022/02/synweb2.png
END:VEVENT
END:VCALENDAR