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Raising Partners Live: Funding in Focus 2022
2022-05-10 09:15 - 17:00 UTC | University of Strathclyde, 16 Richmond Street, Glasgow, G1 1XQ
Raising Partners Live: Funding in Focus 2022
RegisterRaising Partners Live is hosting this full day event at the Technology & Innovation Centre, University of Strathclyde, Glasgow, bringing together investors and entrepreneurs to advance the entrepreneurial ecosystem by empowering start-up and scale-up tech business to access capital.
The one-day conference will focus on everything you need to know about raising investment. Hear from an array of world-class speakers, participate in practical workshops, meet investors, and pitch your business to the professionals.
Limited free tickets available: Raising Partners Live – Raising Partners Live 2022

CadenceTECHTALK: Accelerating Complex SoC Prototyping with Protium X2
2022-04-26 | Webinar
CadenceTECHTALK: Accelerating Complex SoC Prototyping with Protium X2
RegisterThis CadenceTECHTALK will offer an overview of the Protium™ Enterprise Prototyping Platform for fast hardware and software verification.
We will review the traditional prototyping challenges of complex SoCs using a 5G AI-enabled mobile SoC case study—RTL changes required for clocks management, memories, interfaces, multi-FPGA partitioning, and multi-user support. Learn how the Protium X2 platform features and solutions solve these challenges while accelerating the hardware/software co-design verification schedule.

FPGA Frontrunner Meet & Greet
2022-03-23 09:30 - 18:30 (Europe/London)
FPGA Frontrunner Meet & Greet
AgendaNMI is all about sharing knowledge and creating communities. The FPGA Front Runners exists to share knowledge, best practice and to create a community around FPGAs and ASIC development.
Each event is about networking, meeting colleagues, grabbing a coffee and some cake and listening to presentations from suppliers and your peers.
The event is designed to create a community of likeminded engineers, and is run by members for members and the subjects and presentations are chosen by the members, so remain valid.
The ultimate aim is to create a better awareness of FPGAs & ASICs in the UK, drive best practice, identify common issues and challenges and work together to resolve them. This first event is designed to bring together the community, discuss the current market conditions around FPGAs, the issues and technical challenges each member needs to overcome. Look at the skills shortages and what is needed to improve the engineers use of FPGAs. Everyone is welcome and we encourage you to attend and get involved.
Events are planned to run quarterly, with other events or webinars in between as suggested by the community.
Adam Taylor
Adiuvo Engineering & Training Ltd
Adam Taylor is a world recognised expert in design and development of embedded systems and FPGA’s for several end applications.
×Adam Taylor, Adiuvo Engineering & Training Ltd
Adam Taylor is a world recognised expert in design and development of embedded systems and FPGA’s for several end applications. Throughout his career, Adam has used FPGA’s to implement a wide variety of solutions from RADAR to safety critical control systems (SIL4) and satellite systems. He also had interesting stops in image processing and cryptography along the way. Adam has held executive positions, leading large developments for several major multinational companies. For many years Adam held significant roles in the space industry he was a Design Authority at Astrium Satellites (Now Airbus Space) Payload processing group for six years and for three years he was the Chief Engineer of e2v Space Imaging, being responsible for several game changing projects.
FPGAs are Adam ‘s first love, he is the author of numerous articles and papers on electronic design and FPGA design including over 400 blogs and 25 million plus views on how to use the Zynq and Zynq MPSoC for Xilinx.
Adam is Chartered Engineer, Senior Member of the IEEE, Fellow of the Institute of Engineering and Technology, Visiting Professor of Embedded Systems at the University of Lincoln and Arm Innovator, Edge Impulse Ambassador, he is also the owner of the engineering and consultancy company Adiuvo Engineering and Training.
Presentation: PYNQ – FPGA with Python
Read MoreSteve Drew
NMI Electronic Systems
Steve has over 30 years of semiconductor, electronics and design industry experience.
×Steve Drew, NMI Electronic Systems
Steve has over 30 years of semiconductor, electronics and design industry experience. Starting his career at Avnet, he became one of their youngest product managers – looking after Xilinx for the UK. Steve subsequently worked at a number of niche component distributors, promoting and selling , technical component solutions, ranging from video codecs, power products and FPGAs, through to connectivity and display solutions. FPGA’s became his thing in the 1990’s and Steve worked with all the FPGA manufacturers except Altera. Moving on from component distribution Steve has worked at component kitting and PCB assembly companies, and having worked for large multinational companies and smaller privately owned businesses, has given Steve a wide view of the component market place and the challenges faced by companies, and having run his own manufacturing consultancy since 2020 has given him an understanding of the small business sector.
Steve loves the electronics industry and technology in general, is passionate about UK manufacturing and how we can build more here instead of losing it to offshore competition, is a champion of startup’s and innovation. And if you want an opinion on something, just ask him
Read MoreTony Holmes
Cadence
Tony started his career at Digital Equipment in the design & development of Computer Special Systems then moved into the Design and Development of High Performance Bridge Routers.
×Tony Holmes, Cadence
Tony started his career at Digital Equipment in the design & development of Computer Special Systems then moved into the Design and Development of High Performance Bridge Routers, followed by creating a System Level Testing group to test these Bridge/Routers in complex networking scenarios.
Tony moved to Quickturn Design Systems before Quickturn merged with Cadence Design Systems. Tony is a Technical Director at Cadence Design Systems with a long history of focussing primarily on HW based verification using Emulation and FPGA Prototyping.
Tony has responsibility for Technical Engagements for any HW based verification project/engagement within EMEA.
Presentation: 500M Gates in FPGAs (FPGA Prototyping)
A few years ago the concept of running Billions of gates on an FGPA System would have been mind boggling.
This Cadence Presentation will offer an overview of the Protium™ Enterprise Prototyping Platform for fast hardware and software verification.
We will review the traditional prototyping challenges of complex SoCs using a 5G AI-enabled mobile SoC case study—RTL changes required for clock management, memories, interfaces, multi-FPGA partitioning, and multi-user support.
You will learn how the Protium X2 features and solutions solve these challenges while accelerating the hardware/software co-design verification schedule.
Read MoreMyrtle Shah
Founder, Chipflow
Myrtle is an engineer and founder at ChipFlow, working on a reliable end-to-end open source flow for building chips.
×Myrtle Shah, Chipflow
Myrtle is an engineer and founder at ChipFlow, working on a reliable end-to-end open source flow for building chips. They are also the lead developer of nextpnr, an open source FPGA place and route tool, and the creator of the Project Trellis bitstream documentation and open flow for Lattice ECP5 FPGAs. They enjoy walking and gardening in their spare time when they need to get away from computers.
Presentation: OS RISC V SoC built with Python
By combining Amaranth, a Python-based framework for describing and constructing hardware, with a stack of other open source tools, it’s possible to build complex SoCs not just for FPGAs but also taped out as chips. We’ll be having a look at the ecosystem for both as it stands today; some examples of projects using it including the journey to a tapeout-ready, Linux-capable RISC-V SoC on the Skywater 130nm process; and what the future of open tooling might look like.
Read More

Technology Start-Up Event
2022-03-17 12:00 - 19:00 (Europe/London)
Technology Start-Up Event
Our joint Silicon Catalyst and TechWorks event was conceived to help founders learn about the forming, storming, norming and then performing of UK semiconductor startup companies.
We had the great Malcolm Penn take us through the concept that no company is an island when testing their value proposition.
We kicked off with Phillip Burr describing the hugely generous Arm (a Silicon Catalyst strategic partner and In Kind Partner) Flexible Access program that releases the potential of semiconductor startup designers to get market leading design IP.
Two legends of our UK semiconductor startups Phil O’Donovan co-founder CSR Plc and Jerry Loraine talked about “how bad things happen to good people” with stories about patent trolls and go to market challenges.
This led naturally into “the importance of the team” with a single person invention idea from Bruno Johnson. Where Cascoda invented a radio architecture to increase range by 3x for Thread Group #iotdevices & is now shipping Arm based products into #smartcities #smartbuildings all around the world.
This section concluded with a compelling presentation from the illustrious Jim Nicholas walking us through the inventive team idea from Uniphy Ltd
The last session before the break had the wonderful Vaysh Kewada from Salience Labs (a Silicon Catalyst portfolio company) share her deep insights into “creating relentlessly repeatable processes from day 1” of your startup journey. Followed by a hugely insightful deep dive by Pete Hughes the foremost semiconductor product operations executive in the UK on how to ship high volume semiconductor products with the level of quality that your market leading customers will demand.
Back from the break where the Arm catering team laid on a spread that would not look out of place at the Ritz, we leapt into “what problem are you solving?” Patrick Camilleri shared his learnings on how to build semiconductor design IP combined SaaS product offerings and then Gary Spittle founder of Sonical Inc (A Silicon Catalyst portfolio company) projected the huge opportunity in their end to end system play to command the compute in the ear application space.
We concluded the presentations with the eternal “how much money will you need?” The marvellous Tony Milbourn who leads u-blox corporate venturing shared in detail how they look for the secret sauce of semiconductor startup success. Then Owen Metters Foresight Group Williams, the leading semiconductor VC investor in the UK took us through three compelling case studies.
The final panel session lead us into a lively debate into what we need to do to make UK Semiconductor great again and make sure we create an open and inclusive industry where everybody can thrive.

Synopsys: Early and Accelerated SoC Connectivity Verification using VC Formal Connectivity Checking App
2022-03-09
Synopsys: Early and Accelerated SoC Connectivity Verification using VC Formal Connectivity Checking App
RegisterComplex bus protocols, increased on-chip functionalities, coupled with limited shared I/O resources, result in complex wiring connections in SoCs with numerous muxing schemes.
Simulation and structural analysis approaches require huge effort and may lead to bug escapes making them inefficient for SoC connectivity verification. Connectivity verification using formal techniques is exhaustive and helps making designs immune to connectivity bug escapes.
For over a decade, VC Formal Connectivity Checking App has become an essential part of the verification toolkit used by leading edge technology companies. Its ability to scale with the ever increasing SoC design sizes, its performance and ease of use, and its optimized debugging capabilities, make it a market leader in this space.
Join us to learn about SoC connectivity challenges and how Synopsys’ innovative technologies can help you catch and debug sneaky wiring mistakes early with 100% confidence and ease.

Rules of Origin when exporting to the EU
2022-03-03 12:00 - 12:30 (Europe/London)
RULES OF ORIGIN WHEN EXPORTING TO THE EU
Register for FREEWhere your product comes from or is made, can have a huge impact on the tariffs applicable when selling to another country. Ensuring your goods comply with the rules of origin in the EU/UK Trade & Cooperation Agreement is essential for you to export your product smoothly and avoid costly errors.
As of 1st January 2022, to benefit from the reduced rate of Customs Duty, all companies exporting goods to the EU must be able to prove that their goods are of UK/EU origin – it is no longer sufficient to make a declaration on your commercial invoice. Inability to do so may result in delays, demands for duty and even penalties.
This essential one-hour webinar led by TechWorks and The International Trade Consultancy will cover:

What are rules of origin?
Which rules of origin apply to my products?
How can I check if they comply?
How can I prove they comply?
What should I do if they don’t comply?
What is cumulation and does it apply to me?

Hosted by
Lucinda O’Reilly
Lucinda O’Reilly is an international trade consultant with over 10 years’ experience of global imports and exports. As the Exports Director of Ecotile Flooring she developed a successful UK focused manufacturing company to export to over 40 countries worldwide. Having successfully managed Ecotile’s transition through Brexit Lucinda set up The International Trade Consultancy to provide support to companies struggling to navigate the new regulatory landscape and supply chain challenges caused by the pandemic.

Cadence TECHTALK Series: Adopting a Faster, More Efficient Path to Multi-Chiplet Design
2022-02-23 08:00 - 2022-04-06 17:00 UTC
Cadence TECHTALK Series: Adopting a Faster, More Efficient Path to Multi-Chiplet Design
RegisterWith the increasing popularity of multi-chiplet designs that address Moore’s law slowdown and reticle size limitations, leading foundries are offering multiple advanced packaging and die stacking options for different applications.
EDA companies have had to innovate to provide integrated and IC-centric tools while building accurate system-level models to find the fastest and most efficient path for 3D-IC design and analysis.
In this four-part CadenceTECHTALK series, learn how to properly plan and implement stacked digital SoCs, analog/mixed-signal designs, and entire 2.5-D/3-D systems, including meeting system-level power and thermal analysis requirements through an integrated 3D-IC solution.

Commodity Codes and Import Declarations
2022-02-17 12:00 - 12:30 (Europe/London)
COMMODITY CODES AND IMPORT DECLARATIONS
Register for FREEOn January 1st 2022, two changes came into effect that importers and exporters should be aware of. The World Customs Organisation updated the Harmonised System so there have been a number of changes to commodity codes, especially for electronic products.
Full import declarations are now required for all goods entering GB from the EU at point of import and a new digital system is in place to manage the increase in data.
This essential 30 minute webinar led by TechWorks and The International Trade Consultancy will cover:

What are commodity codes?
How can I check my commodity codes are still correct?
What do I need to do if they’ve changed?
How does the new import declaration system work?
How will it affect my business?

Hosted by
Lucinda O’Reilly
Lucinda O’Reilly is an international trade consultant with over 10 years’ experience of global imports and exports. As the Exports Director of Ecotile Flooring she developed a successful UK focused manufacturing company to export to over 40 countries worldwide. Having successfully managed Ecotile’s transition through Brexit Lucinda set up The International Trade Consultancy to provide support to companies struggling to navigate the new regulatory landscape and supply chain challenges caused by the pandemic.

Synopsys: 3DIC Design from Concept to Silicon
2022-02-10 18:00 - 19:00 (Europe/London)
Synopsys: 3DIC Design from Concept to Silicon
REGISTERFor some high-performance computing (HPC) designs, monolithic SoCs aren’t producing the scalability and yield that designers are looking for. New trends towards 3DIC design are emerging introducing new design challenges, such as reliable die-to-die connectivity, high bandwidth memory, integration, and 2.5D or 3D packaging options. This webinar will outline the different market trends for 3DIC designs and explain how designers can maintain such new trends to deliver their designs with optimized latency, power, performance, and area. We will also demonstrate the construction of a 3DIC design and our 3rd generation HBM interposer auto-routing solution.
Attendees will:

Learn about considerations and trends for a more efficient 3DIC design integration
Find out how protocols like HBM3 and Die-to-Die are influencing 3DIC designs
See a demo of a 3DIC design construction

SPEAKERS
Kenneth Larsen is a product marketing director in the Silicon Realization Group at Synopsys. He is a versatile leader with a strong background in defining and executing product vision, marketing strategy, inspiring product development teams, translating technology concepts into customer solutions, developing high-performance global organizations, conceiving and driving new and emerging products to scale from the ground up, guiding marketing, and enabling sales. Kenneth has a degree in electrical engineering and additional coursework in strategic growth at Columbia Business School, and Artificial Intelligence at MIT Sloan School of Management.
Eric Means is an Applications Engineer in Hillsboro, Oregon supporting Synopsys 3DIC Compiler users. He has worked with ASIC and EDA customers for 25 years at NEC, Renesas, & Synopsys. He has a BS in Electrical Engineering from Washington State University and an MS in Computer Engineering from the Oregon Graduate Institute.
*This webinar is in partnership with SemiWiki and Synopsys*

Synopsys: Exploring a Software First Approach to Avoid SoC Re-spins
2022-02-09 17:30 - 18:00 (Europe/London)
Synopsys: Exploring a Software First Approach to Avoid SoC Re-spins
REGISTERTraditional coverage-based verification methods are no longer sufficient to verify complex SoCs integrating many processor cores and IP subsystems. To conquer the verification challenge of complex SoCs, companies are shifting their development paradigm to a software first approach. By considering the target software up front, as a critical part of the SoC development process, designs teams are able to signoff a new SoC for production with high confidence.
In this Synopsys webinar we will cover the primary pre-silicon methods, along with their benefits, to execute a software first strategy:
– Virtual prototyping
– Emulation
– FPGA-based prototyping
Through the example of a production processor design project, we will provide insight into each methodology and how it helps to accelerate verification coverage. This event is hosted by a software first methodology expert and aimed at verification and software teams working on next-generation SoC designs.
