BEGIN:VCALENDAR
VERSION:2.0
PRODID:-//DESN - ECPv6.18.2//NONSGML v1.0//EN
CALSCALE:GREGORIAN
METHOD:PUBLISH
X-WR-CALNAME:DESN
X-ORIGINAL-URL:https://desn.org.uk
X-WR-CALDESC:Events for DESN
REFRESH-INTERVAL;VALUE=DURATION:PT1H
X-Robots-Tag:noindex
X-PUBLISHED-TTL:PT1H
BEGIN:VTIMEZONE
TZID:Europe/London
BEGIN:DAYLIGHT
TZOFFSETFROM:+0000
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TZOFFSETFROM:+0100
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DTSTART:20231029T010000
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BEGIN:DAYLIGHT
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END:DAYLIGHT
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TZOFFSETFROM:+0100
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DTSTART:20241027T010000
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BEGIN:DAYLIGHT
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DTSTART:20250330T010000
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DTSTART:20251026T010000
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TZOFFSETTO:+0100
TZNAME:BST
DTSTART:20260329T010000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:+0100
TZOFFSETTO:+0000
TZNAME:GMT
DTSTART:20261025T010000
END:STANDARD
BEGIN:DAYLIGHT
TZOFFSETFROM:+0000
TZOFFSETTO:+0100
TZNAME:BST
DTSTART:20270328T010000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:+0100
TZOFFSETTO:+0000
TZNAME:GMT
DTSTART:20271031T010000
END:STANDARD
END:VTIMEZONE
BEGIN:VTIMEZONE
TZID:UTC
BEGIN:STANDARD
TZOFFSETFROM:+0000
TZOFFSETTO:+0000
TZNAME:UTC
DTSTART:20210101T000000
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTART;VALUE=DATE:20260826
DTEND;VALUE=DATE:20260827
DTSTAMP:20260422T090649Z
CREATED:20260422T090649Z
LAST-MODIFIED:20260422T090649Z
UID:23562-1787702400-1787788799@desn.org.uk
SUMMARY:TechWorks Semiconductors to Systems Summit 2026
DESCRIPTION:
URL:https://techworks.org.uk/techworks/tws2s26/#new_tab
LOCATION:London
CATEGORIES:DESN Event,TechWorks Event
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END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Europe/London:20260820T140000
DTEND;TZID=Europe/London:20260820T150000
DTSTAMP:20260511T121055Z
CREATED:20260511T121055Z
LAST-MODIFIED:20260511T121055Z
UID:23636-1787234400-1787238000@desn.org.uk
SUMMARY:Women in TechWorks: From Qubits to Confidence: Verifying Quantum Error Correction
DESCRIPTION:
URL:https://us06web.zoom.us/webinar/register/WN_jqtxyiffRPmeJwEHwqzaVA#new_tab
LOCATION:Webinar
CATEGORIES:TechWorks Event
ATTACH;FMTTYPE=image/jpeg:https://desn.org.uk/wp-content/uploads/2026/05/WITW-Assorted-speaker-images-18.jpg
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Europe/London:20260617T091500
DTEND;TZID=Europe/London:20260617T172000
DTSTAMP:20260428T171515Z
CREATED:20260224T120629Z
LAST-MODIFIED:20260428T171515Z
UID:23346-1781687700-1781716800@desn.org.uk
SUMMARY:Women in TechWorks: Engineering Intelligently
DESCRIPTION:Women in TechWorks Launch EventRegisterConnecting Talent\nWomen in TechWorks comes together in person for the first time — bringing the community to the heart of the UK’s technology ecosystem. \nHosted at Arm\, this landmark event builds on the program created through tech talks\, town halls and fireside chats. \nWhy Attend?\nTechWorks sits at the centre of the UK’s leading technology communities — semiconductors\, embedded systems\, cybersecurity\, future compute and AI. \nOn 17 June\, we bring together the full spectrum of talent across these sectors for a day of: \n\nInspiring talks from exceptional women in industry\nPanel discussions spanning leadership\, innovation and visibility\nNetworking across career stages — from early careers to founders and C-suite leaders\n\nWho It’s For\nThis event is open to everyone. \nWhile it showcases outstanding women shaping UK technology\, it’s designed for everyone \, and be part of a stronger\, more inclusive tech ecosystem. \nFrom Momentum to Action\nWomen in TechWorks is focused on: \n\nLeadership\nMentorship\nVisibility\n\nThis first face-to-face event brings those pillars to life \nJoin us for a day that connects people\, ideas and opportunity.
URL:https://techworks.org.uk/event/women-in-techworks-engineering-intelligently/#new_tab
LOCATION:Arm\, Cambridge\, CB1 9NJ
CATEGORIES:TechWorks Event
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BEGIN:VEVENT
DTSTART;TZID=Europe/London:20250827T130000
DTEND;TZID=Europe/London:20250827T133000
DTSTAMP:20250818T145917Z
CREATED:20250811T113338Z
LAST-MODIFIED:20250818T145917Z
UID:23012-1756299600-1756301400@desn.org.uk
SUMMARY:Women in TechWorks – TechTalk series launch with Ras Attale (Siemens)
DESCRIPTION:REGISTERScalable verification for SoC: Managing complexity at scale\nWe’re excited to launch our Women in TechWorks network with the first in a series of inspiring and technically rich TechTalks. \nKicking off this series\, we’re proud to welcome Ras Attale\, Senior Hardware Engineer at Siemens\, who’ll be sharing insights on Scalable Verification for SoC: Managing complexity at scale. \nWith the increasing complexity of modern System-on-Chip (SoC) designs\, scalable verification methods are more critical than ever. \nRas will delve into approaches for managing this complexity\, drawing on her experience in large-scale verification environments and sharing strategies that enable engineering teams to scale effectively and maintain quality at speed. \nRas brings a wealth of expertise\, having previously contributed to the verification team at Arm\, specifically on Cortex-A processors. \nIn addition to her current role at Siemens\, she is also pursuing a Masters in Software and Systems Security at the University of Oxford\, reflecting her deep commitment to continuous learning and leadership in advanced technology domains. \nJoin us for what promises to be a fascinating and insightful session as we launch Women in TechWorks\, a platform for connection\, collaboration\, and visibility for women across the UK tech and engineering ecosystem.
URL:https://desn.org.uk/event/women-in-techworks-techtalk-series-launch-with-ras-attale-siemens/
LOCATION:Webinar
CATEGORIES:TechWorks Event
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END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Europe/London:20250206T083000
DTEND;TZID=Europe/London:20250206T170000
DTSTAMP:20250204T165348Z
CREATED:20241002T094032Z
LAST-MODIFIED:20250204T165348Z
UID:19565-1738830600-1738861200@desn.org.uk
SUMMARY:Trends in Semiconductor System Design
DESCRIPTION:Trends in Semiconductor System Design\nRegister for FREEThank you to our Sponsors\nThe Trends in System Design event\, hosted by DESN in Reading on February 6th\, will be open to both members and non-members. We will examine emerging trends in semiconductor system design\, with a particular focus on how AI/ML is being used in product design and the design flow. \nThe event will also address the challenges in designing IP to meet the compute intensive demands of AI\, including bandwidth and latency issues related to data access\, SoC design challenges\, and obstacles related to the latest technology nodes. \nAdditional topics will cover manufacturing\, testing\, yield challenges\, and the transition to chiplets. \nParticipants will also discuss the process of validating and signing off chips for production\, as well as cost and return-on-investment considerations.\nA second major focus will be on how to best leverage AI’s potential in design flows. Key discussions will explore where AI can be deployed for maximum benefit without introducing risks such as “hallucinations” or security vulnerabilities. \nPresentations will include insights from EDA companies on the features they are incorporating into their tools\, as well as contributions from users who are developing their own solutions. \n\n\n\n\n\nTime\nEvent\n\n\n\n\n09:00\nRegistration\, arrival and refreshments\n\n\n09:25\nIntroduction\n\n\n09:30\nKeynote: Chiplet Standards: A New Route to Arm-based Custom Silicon – Rob Dimond\, System Architect and Fellow\, Arm\n\n\n10:00\nThe Turkey Voting For Christmas – AI and the Verification Engineer – Andrew Bond\, Director – Silicon Verification\, Axelera AI\n\n\n10:30\nImec research: driving advancements in semiconductor technology – Bruno Jansen\, Regional Managing Director\, imec Cambridge UK\n\n\n11:00\nFrom Chips to Systems: Redefining Semiconductor Packaging and Integration – Dr. Jayakrishnan Chandrappan\, CSA Catapult\n\n\n11:30\nBreak\n\n\n12:00\nUsing Generative AI to Transform Chip to Data Center Design Flows – Rod Metcalfe\, Senior Product Management Group Director\, Cadence\n\n\n12:30\nAI-Enabling a Revolution in Chip Design Productivity – Loay Qteet\, Staff Application Engineer\, Synopsys\n\n\n13:00\nUnlocking the AI Advantage with Siemens EDA Products – Sathishkumar Balasubramanian\, Siemens\n\n\n13:30\nTechWorks AI Group  – Dr Mike Bartley\, Senior VP\, Tessolve\n\n\n13:45\nLunch followed by Close\n\n\n\n\nSpeakers\nSathishkumar Balasubramanian\, Senior Director of Product Management\, Marketing & Biz Dev\, Siemens \nUnlocking the AI Advantage with Siemens EDA Products \nWhat’s behind the excitement in the industry around AI? AI is impacting virtually every aspect of semiconductor design. Verifiably accurate AI solutions that “just work” deliver results that users can trust and accelerate schedules\, while reducing the overall resources needed for chip design and verification. At Siemens EDA\, we have successfully leveraged AI technologies to accelerate design and verification.  In this session\, we will provide an overview of state-of-the-art AI-powered solutions encompassing the entire Siemens EDA product portfolio. \nBiography \nSathish currently leads the product management and marketing organization for Solido Custom IC division and AI initiatives at Siemens. Sathish is an experienced product leader with over 20+ years of experience in EDA industry. Sathish’s focus is on bringing value to semiconductor ecosystem through innovative solutions. Sathish is proficient in scaling product portfolio growth and expansion of market share/revenue through relentless focus on data-based execution and thought leadership. \nPrior to Siemens\, Sathish held various product management\, strategic business development and corporate development roles for Cadence Design Systems and Synopsys. Sathish received his BS in Electronics & Communication from University of Madras\, MS in computer engineering from University of Alabama & MBA from UC Berkeley- Hass School of Business. \n\nAndrew Bond\, Director – Silicon Verification\, Axelera AI \nThe Turkey Voting For Christmas – AI and the Verification Engineer \nAs EDA embraces the new opportunities AI brings how will it change what we think of as verification.\nFrom tooling to coding\, from developing to debugging\, from team dynamics to hiring how might things be about to change\, and how can we be best prepared. \nBiography \nAndy has 25 years’ experience as a verification engineer and leader. After starting his career verifying processors for ST he was part of the foundation team for Icera before leading their verification team after the acquisition by NVIDIA.\nHaving since built and developed teams for Cirrus Logic and in fintech\, he is currently director of verification for Axelera AI\, helping solve the verification challenges of the next generation of AI chips. \n\nRob Dimond\, System Architect and Fellow\, Arm \nChiplet Standards: A New Route to Arm-based Custom Silicon \nA key challenge our partners are consistently looking to solve is: How can we continue to push performance boundaries\, with maximum efficiency\, while managing costs associated with manufacturing and yield? Today\, as the ever more complex AI-accelerated computing landscape evolves\, a key solution emerging is chiplets. \nChiplets are designed to be combined to create larger and more complex systems that can be packaged and sold as a single solution\, made of a number of smaller dice instead of one single larger monolithic die. This creates interesting new design possibilities\, with one of the most exciting being a potential route to custom silicon for manufacturers who historically chose off-the-shelf solutions. \nThis talk will describe the standards framework that Arm is building with our partners\, and the broader industry. Including our own specifications such as the Arm Chiplet System Architecture (Arm CSA)\, AMBA chip-to-chip and the role of industry standards such as UCIe. \nBiography \nRob Dimond is System Architect and Fellow at Arm. \nRob is a member of the leadership team for the Architecture and Technology group at Arm where his focus is future technology development for the infrastructure segment (servers & networking). \nPrior to Arm\, Rob was Chief Hardware Architect at FPGA computing start-up Maxeler. Rob holds degrees in Electronic Engineering and Computer Science from Imperial College\, London. \n\nRod Metcalfe\, Senior Product Management Group Director\, Cadence \nUsing Generative AI to Transform Chip to Data Center Design Flows \nDuring this session\, we will delve into advancements in Generative AI technology and its transformative impact on chip design technologies and methodologies. Hear how Generative AI is reshaping chip design\, optimizing chip performance\, and unlocking new possibilities for data center architecture. We will share current case studies\, and future trends that showcase the potential of Generative AI to drive innovation and efficiency in chip design workflows. \nBiography \nRod Metcalfe is a Senior Group Director in the Digital and Signoff product management team at Cadence\, responsible for digital implementation flows and artificial intelligence technology development. He has been involved with EDA for over 20 years\, gaining experience in all parts of the digital design flow from synthesis to sign-off. Before joining EDA\, Rod was a chip designer in the aerospace industry. \n\nDr. Jayakrishnan Chandrappan\, Head of Advanced Packaging\, CSA Catapult \nFrom Chips to Systems: Redefining Semiconductor Packaging and Integration \nThis talk explores the evolution of semiconductor packaging from traditional chip-level approaches to advanced system-level integration. It highlights cutting-edge trends such as 3D integration\, hybrid and heterogeneous integration\, and additive manufacturing\, which are transforming performance\, miniaturization\, and functionality. The session also addresses challenges like thermal management\, sustainability\, and supply chain resilience\, while emphasizing the role of co-design and digital twins in optimising system designs. Attendees will gain insights into how innovative packaging techniques are redefining the semiconductor industry’s capabilities and driving next-generation applications in AI\, IoT\, and beyond. \nBiography \nDr. Jayakrishnan Chandrappan\, Head of Advanced Packaging at CSA Catapult\, has over 25 years of global experience in the semiconductor industry. At CSA Catapult\, he spearheaded the establishment of a state-of-the-art compound semiconductor packaging facility and an expert team driving cutting-edge solutions in semiconductor integration for transformative applications\, including NetZero\, Future Telecoms\, and advanced sensing technologies. \nHe serves as an external advisory board member for the University of Bristol and the University of Leeds in the UK\, and as a Board of Studies member for Cochin University of Science & Technology (CUSAT) in India. His influence is further amplified through his active participation in industry bodies such as SEMI\, the Europe APC Committee\, and the International Microelectronics Assembly & Packaging Society (IMAPS) UK Chapter. \nPreviously\, Dr. Jay held technology leadership roles at Global Foundries Inc. (US)\, IME at A-STAR Singapore\, and as a Scientist for India’s Ministry of Electronics & Information Technology. A co-founder of two start-ups\, his accomplishments include Europe’s most prestigious Marie Skłodowska-Curie Fellowship and the Royal Society of Chemistry’s Emerging Technology Showcase Award.\nHe holds a PhD in materials engineering from University of LEEDS. \n\nBruno Jansen\, Regional Managing Director\, imec Cambridge UK \nImec research: driving advancements in semiconductor technology \nImec is the world’s leading non-profit semiconductor research centre\, dedicated to accelerating semiconductor innovation through collaboration. By pushing Moore’s Law to its limits\, imec continues to scale down the dimensions of logic devices while exploring new pathways at the system level. For decades\, imec has been at the forefront of innovation on the technology side of the ecosystem\, delivering differentiation that has benefited the entire semiconductor industry. To sustain its role in shaping the future of technology\, imec is broadening its focus to address system-scaling challenges in its roadmap. This presentation will provide insights into the research efforts imec is undertaking to further advance semiconductor technology. \nBiography \nBruno Jansen recently joined imec as Regional Managing Director of imec UK and Site Manager of imec Cambridge UK\, focusing on growing the imec Cambridge UK team and exploring collaboration opportunities across the UK. Bruno began his career at Motorola in Toulouse\, working on the design of 3G chipsets. In 2002\, he joined Arm in Cambridge\, initially as a CPU Design Verification Engineer\, and later managed the design verification activities for a CPU product line. He also oversaw operations for UK\, EU\, and US government-funded research programs at Arm Research before becoming Director of Operations for Enterprise Marketing at Arm in 2017. In 2022\, Bruno joined the startup Krai as Director of Operations\, where he was responsible for finance\, recruitment\, and legal compliance. \n\nLoay Qteet\, Staff Application Engineer\, Synopsys \nAI-Enabling a Revolution in Chip Design Productivity \nIn the rapidly evolving semiconductor industry\, an unprecedented productivity challenge is being confronted\, driven by a global talent shortage and increasing demands to accelerate chip design development while managing complexity and cost. This session will delve into the role of Artificial Intelligence as a transformative solution\, highlighting its potential to enable new levels of efficiency in the chip design process. \nBiography \nLoay Qteet\, Applications Engineering\, Staff Engineer at Synopsys\, with six years of experience in the Electronic Design Automation (EDA) field. He specializes in physical design\, RTLIIGDS flow development\, and EDA applications of Implementation and AI. Loay has played a key role in supporting various customer\, helping them to achieve their goals effectively and ensuring that Synopsys products meet their evolving requirements. \n\nDr Mike Bartley\, Senior VP\, Tessolve  \nTechWorks AI Group \nDr Mike Bartley has over 35 years of experience in software testing and hardware verification. He has built and managed state-of-the-art test and verification teams inside several companies (including STMicroelectronics\, Infineon\, Panasonic\, and the start-up ClearSpeed) and also advised several companies on organisational verification strategies (ARM\, NXP\, and multiple start-ups). He has been working on the application of artificial intelligence (AI) since using genetic algorithms in 1998 and now helps companies to adopt best practice AI in DV to improve the productivity and quality of their verification. \nMike successfully founded and grew a software test and hardware verification services company to 450+ engineers globally\, delivering services and solutions to over 50+ clients in various technologies and industries. The company was acquired by Tessolve Semiconductors where he is now Senior VP driving sales in Europe\, global DV strategies\, and R&D into adoption of AI and best practice. Tessolve is a a global company with 3000+ employees supporting clients in VLSI\, silicon test and qualification\, PCB\, and embedded product development in multiple vertical industries.
URL:https://desn.org.uk/event/trends-in-semiconductor-system-design/
LOCATION:Novotel Reading Centre\, 25b Friar Street\, Reading\, RG1 1DP
CATEGORIES:TechWorks Event
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BEGIN:VEVENT
DTSTART;TZID=Europe/London:20231207T183000
DTEND;TZID=Europe/London:20231208T010000
DTSTAMP:20230926T154249Z
CREATED:20230926T154249Z
LAST-MODIFIED:20230926T154249Z
UID:19272-1701973800-1701997200@desn.org.uk
SUMMARY:TechWorks Awards and Gala Dinner 2023
DESCRIPTION:TechWorks Awards and Gala Dinner 2023\nSecure your PlaceApply for an AwardWe are delighted to announce that our annual TechWorks Awards & Gala Dinner will be held on Thursday 7th December 2023\, at the Hilton Deansgate Hotel\, Manchester.\nThe event brings together hundreds of executives & professionals from across industry\, providing an excellent opportunity to network with industry leaders\, meet new clients or host existing ones whilst building brand awareness. At the dinner\, we announce the winners of the TechWorks Awards – celebrating achievements & behaviours conductive to a healthy & vibrant industry. \nThe TechWorks awards are open to all organisations active within the tech industry\, with award categories to fit a wide range of sectors. They are FREE to enter\, with a simple online process. \nWith a meal\, awards ceremony\, networking\, our guest speaker (comedian Alun Cochrane) and DJ\, dont miss out on the party of the year. \nVisit the TechWorks Awards and Gala Dinner website for full details.
URL:https://desn.org.uk/event/techworks-awards-and-gala-dinner-2023/
LOCATION:Hilton Deansgate Hotel\, 303 Deansgate\, Manchester\, Select a State or Province:\, M3 4LQ\, United Kingdom
CATEGORIES:TechWorks Event
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END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Europe/London:20230628T120000
DTEND;TZID=Europe/London:20230628T124500
DTSTAMP:20230414T104331Z
CREATED:20230414T091759Z
LAST-MODIFIED:20230414T104331Z
UID:19152-1687953600-1687956300@desn.org.uk
SUMMARY:Unwrapping the Patent Box for Automation & Technologies businesses
DESCRIPTION:Unwrapping the Patent Box for Automation & Technologies businesses\nRegisterTechWorks members new to Patent Box will benefit from a practical overview of how it works and the benefits it delivers\, while those already familiar with the regime can find out more about the synergies between Patent Box\, R&D tax relief and other innovation incentives.\nKey takeaways: \nLearn to identify untapped IP and R&D which may have been overlooked\nUnderstand what qualifies for relief\, including popular misconceptions\nQuantify what Patent Box could be worth to your business \nSpeakers: \nDavid Byrne\, Director\nAngela Banerjee\, Senior Tax Manager
URL:https://desn.org.uk/event/unwrapping-the-patent-box-for-automation-technologies-businesses/
LOCATION:Webinar
CATEGORIES:TechWorks Event
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END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Europe/London:20230504T110000
DTEND;TZID=Europe/London:20230504T114500
DTSTAMP:20230420T151115Z
CREATED:20230420T151042Z
LAST-MODIFIED:20230420T151115Z
UID:19161-1683198000-1683200700@desn.org.uk
SUMMARY:TechWorks & Envantage Partner Webinar – Power up your energy strategy\, market insights and cost reduction techniques
DESCRIPTION:TechWorks & Envantage Partner Webinar – Power up your energy strategy\, market insights and cost reduction techniques\nRegisterAre you are concerned that your business could be missing out on valuable energy discount schemes or want to know if you could pay less for your energy?\nJoin TechWorks and Envantage on Thursday 4th May for a focused webinar on how to find solutions for rising energy costs\, understand how the energy markets work and how Envantage can find the right strategy to help your business maximise potential savings\, hosted by industry experts Brian Gladwin and Meri Bortsvadze. \nTechWorks and Envantage have partnered together to provide members with exclusive access to sophisticated energy procurement solutions which are usually limited to very large energy users. Together we have created a bespoke TechWorks purchasing portfolio which offers flexible solutions and manages risks allowing members to future proof your businesses in volatile energy markets. \nWhy join this webinar? \n• Learn about a more strategic approach to procurement.• Understand which energy procurement options are available to you.• Learn about the new exclusive TechWorks purchasing portfolio and how it can benefit your business.• Understand the Energy Bills Discount Scheme and what extra support is available to the sector.• Gain an Insight to Energy Markets• Prepare for the next steps for your business.
URL:https://desn.org.uk/event/techworks-envantage-partner-webinar-power-up-your-energy-strategy-market-insights-and-cost-reduction-techniques/
LOCATION:Webinar
CATEGORIES:TechWorks Event
ATTACH;FMTTYPE=image/jpeg:https://desn.org.uk/wp-content/uploads/2023/04/Envantage-Webinar2.jpg
END:VEVENT
BEGIN:VEVENT
DTSTART;VALUE=DATE:20221208
DTEND;VALUE=DATE:20221209
DTSTAMP:20220715T094939Z
CREATED:20220715T094939Z
LAST-MODIFIED:20220715T094939Z
UID:18886-1670457600-1670543999@desn.org.uk
SUMMARY:TechWorks Gala Dinner 2022
DESCRIPTION:WEBSITEBOOK NOWAWARDSWe are delighted to announce that our annual TechWorks Awards & Gala Dinner will be held on Thursday 8th December 2022\, at the Millennium Gloucester Hotel\, London.\nThe event brings together hundreds of executives & professionals from across industry\, providing an excellent opportunity to network with industry leaders\, meet new clients or host existing ones whilst building brand awareness. At the dinner\, we announce the winners of the TechWorks Awards – celebrating achievements & behaviours conducive to a healthy & vibrant industry. \nThis years Guest Speaker and Awards host is Paul Sinha who made his name on ITV’s hit quiz show\, The Chase\, where his quick wit and intelligence is highly popular with audiences. It is on the comedy circuit though that Paul comes into his own. \nApply for an award\nThe TechWorks Awards provide a fantastic showcase for excellence in the fast-paced tech industry – celebrating achievements & behaviours conducive to a healthy and vibrant industry. The 2022 awards are NOW open with award categories to fit all individuals and organisations active within the tech industry. All awards are completely FREE to enter\, with a quick and simple online process. \nThis year\, the awards are split into three main categories and are designed to suit individuals\, companies and organisation across the entire tech industry. They have historically attracted an impressive number of entries showcasing some amazing tech propositions. The 2022 Categories feature a strong range of awards from Automotive\, Manufacturing and IoT to Research Excellence. \nAlan Banks\, CEO\, TechWorks commented\, “Our Annual Awards are designed to be as inclusive as possible for both organisations and individuals across the tech industry. We are always delighted with not only the volume but the quality of entrants for the awards and we are looking forward to reviewing this year’s applications. \nThe awards have uncovered some truly ground-breaking businesses and inspirational individuals and we are looking forward to meeting many of the short-listed applicants and celebrating the Industry’s best at our gala dinner.”Applicants are invited to submit their FREE online entries from 12pm on Monday 4th July with the closing date for entries is Friday 30th September. To find out more and to apply for the awards – please visit the dedicated Awards website.
URL:https://desn.org.uk/event/techworks-gala-dinner-2022/
LOCATION:Millennium Gloucester Hotel\, 4-18 Harrington Garden\, London\, SW7 4LH
CATEGORIES:TechWorks Event
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