FPGA FRONT RUNNER : Using AI in development and product for FPGA
February 18 @ 9:00 am - 2:00 pm
FPGA FRONT RUNNER : Using AI in development and product for FPGA
The FPGA Front Runner event aims to bring together FPGA design and verification communities to discuss gate array-related topics. Participants can share knowledge, learn about current developments, and network with others.
The FPGA Front Runner event, themed “Using AI in development and product for FPGA,” is scheduled for Tuesday, 18th February 2025, from 9:00 AM to 2:00 PM at Renishaw, UK. For more information and registration, visit https://www.tickettailor.com/events/alpinumconsulting/1505991
A few speaker slots are still open for industry experts to share their insights. If you’re interested in presenting, please contact Mike Bartley at [email protected].
Agenda (GMT)
| Time | Speaker | Details |
|---|---|---|
| 09.00 | Arrival and registration | |
| 09.30 | Pete Leonard, Renishaw | Introduction to Renishaw |
| 09.40 | Gareth Richards, AI Manager, TechWorks | TechWorks |
| 10.00 | Alexander Montgomerie Corcoran, CEO, Heronic | Heronic |
| 10:30 | David Harold, Chief Operating Officer, RED Semiconductor | RED Semiconductor |
| 11.00 | Pedro Machado, Senior Lecturer in Computer Science, Nottingham Trent University | Nottingham Trent |
| 11:30 | Refreshment break | |
| 12:00 | Jeremy Bennett, Embecosm | |
| 12:30 | TBC | |
| 13:00 | TBC | |
| 13::30 | Lunch | |
| 14:00 | Close |
Prior to the main event, we are pleased to offer a pre-event overview showcasing the key areas of discussion on Tuesday, 21st Jan 2025. We kindly request your attendance for a 30-minute preview.